ChipVQA: Benchmarking Visual Language Models for Chip Design

27 Sept 2024 (modified: 20 Nov 2024)ICLR 2025 Conference Withdrawn SubmissionEveryoneRevisionsBibTeXCC BY 4.0
Keywords: Multimodal LLM; Chip Design and Manufacturing; VQA
TL;DR: We present a benchmark suite for VLM on chip design and manufacturing knowledge
Abstract: Large-language models (LLMs) have exhibited great potential to as- sist chip designs and analysis. Recent research and efforts are mainly focusing on text-based tasks including general QA, debugging, design tool scripting, and so on. However, chip design and implementa- tion workflow usually require a visual understanding of diagrams, flow charts, graphs, schematics, waveforms, etc, which demands the development of multi-modality foundation models. In this paper, we propose ChipVQA, a benchmark designed to evaluate the capability of visual language models for chip design. ChipVQA includes 142 carefully designed and collected VQA questions covering five chip design disciplines: Digital Design, Analog Design, Architecture, Physical Design and Semiconductor Manufacturing. Un- like existing VQA benchmarks, ChipVQA questions are carefully designed by chip design experts and require in-depth domain knowledge and reasoning to solve. We conduct comprehensive evaluations on both open-source and proprietary multi-modal models that are greatly challenged by the benchmark suit. ChipVQA examples are available at https://anonymous.4open.science/r/chipvqa-2079/.
Primary Area: datasets and benchmarks
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Submission Number: 12186
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