Abstract: A key factor affecting the computational time of floating random walk (FRW)-based capacitance extraction is the variance of underlying Monte Carlo (MC) sample of capacitance. For achieving a fixed accuracy of result, the number of walks executed is proportional to the variance of this underlying random variable. In this work, we study the way to reduce the variance of random variable in FRW method through some theoretical analysis. An FRW method with symmetric multiple-shooting (SMS) walks is proposed, which stems out $N_{s}$ symmetric subwalk paths from a same sample point on Gaussian surface (with $N_{s}$ being 2, 4, 8 or 16). Theoretical analysis reveals that the method with SMS walks could reduce the number of walks compared to the FRW method with important sampling (IS) approach under some assumption, and thus runs faster even considering the increase of hops within a walk. Its benefits also include the reduction of sampling points on Gaussian surface, which shows large benefit when the sampling on a complex Gaussian surface is very costly. Numerical experiments on the parallel-plate structure have validated the correctness of the theoretical analysis on the variances. With test cases from integrated circuit and flat panel display design, the proposed method with SMS walks is compared with the method with IS approach and the method with both IS and stratified sampling (SS) approach. The results show that the proposed method with SMS walks runs in similar speed or much faster than the FRW method using the IS+SS scheme, with up to $10.1 \times $ speedup.
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