Hardware Simulation for Analog Ultrasonic 2D Convolution

Juneho Hwang, Xiangyu Chen, Travis Zhang, Luis Amaro, Kilian Q Weinberger, Peter Doerschuk, Amit Lal

Keywords: simulation, convolution, ultrasonic, hardware, accelerator, Fourier transform, acoustic, wave

TL;DR: Ultrasonic simulation demonstrates faster and more efficient convolution neural networks.

Abstract: As its name suggests, the convolution operator is the basis and an essential component in Convolutional Neural Networks (CNNs). At the moment, modern CNN architectures rely heavily on parallel computation using GPUs and CPUs to perform many convolutions as fast as possible. However, the performance of computing CNNs is reaching its limit as the scaling of transistors approaches its size limits. The convolutional theorem suggests the possibility of using acoustic waves to efficiently perform the convolution operations through Fourier transforms in analog. This promises hardware that would be several orders of magnitude faster than existing silicon-based approaches. However, to date, nobody has shown the practical feasibility of such an approach. In this paper, we describe the first physics-based simulator for Ultrasonic Fourier Transform Convolutions (UFTC). By exploiting the diffraction nature of the waves, the Fourier transforms can be computed in the time it takes to propagate an ultrasonic wavefront. Our results show that ultrasonic computation could drastically improve the performance of CNNs by 12-458x FLOPS reduction and 1.3-4x computation speedup without loss of prediction accuracy.

Primary Area: infrastructure, software libraries, hardware, systems, etc.

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Submission Number: 7590