Leveraging Instruction Language Model to Generate Vectorized RISC-V Tensor Programs

ICLR 2026 Conference Submission13445 Authors

Keywords: Compiler; LLM; Code Generation; RISC-V; Efficient Fine-Tuning

Abstract: Auto-vectorization is a powerful optimization that significantly improves the performance of tensor programs on modern instruction set architectures.Transforming tensor programs into high performance vectorized programs is in high demand. However, traditional compilers often overlook opportunities to vectorization.Meanwhile, hand-crafting vectorized optimization using specialized instructions remains a complicated and error-prone endeavor that requires in-depth knowledge of specific instruction set architectures and compilers. In this paper, we introduce \textbf{RISCompiler}, a compiler designed to generate vectorized tensor programs with auto-vectorization tailored for the RISC-V target with vector extension. The main concept involves transforming the tensor program exploration task into generation task exploiting an instruction language model (ILM). To facilitate this, we create an instruction sentence representation suitable for ILM, which includes transformation details to accurately represent vectorized RISC-V tensor programs. RISCompiler uses an innovative, parameter-efficient fine-tuning mechanism to enhance domain adaptation by strategically concentrating on vectorized components, thereby boosting both fine-tuning and inference efficiency. During the compilation process, the ILM incorporates insights from offline learning and prior transformations to make optimal optimizations within the current design space. Experimental results demonstrate that RISCompiler, which are capable of generating high-performance vectorized tensor programs automatically, surpasses existing state-of-the-art compilers and scalar versions by a substantial margin.

Primary Area: optimization

Submission Number: 13445