Keywords: Logic Circuits, Arithmetic Circuits, Knowledge Compilation, Tractable Models, Probabilistic Inference
TL;DR: We characterize boolean And-Sum Circuits in terms of logical constraints and discuss their relationship to deterministic and decomposable Boolean circuits.
Abstract: And-Sum Circuits are a recently proposed target representation language for knowledge compilation that utilizes AND and SUM nodes with signed edges. A key property of these circuits is "booleanity", which states that every subcircuit computes a 0/1-valued function.
We provide a characterization of booleanity in terms of logical restrictions on the inputs to SUM nodes, analogous to how determinism is characterized in traditional Boolean Circuits. We demonstrate that And-Sum Circuits where SUM nodes are connected by either at most one positive edge or by only positive edges can be efficiently translated to and from a semantically equivalent decomposable and deterministic Boolean Circuits. This implies that And-Sum Circuits whose SUM nodes have input degree at most two are expressively equivalent to decomposable and deterministic Boolean Circuits.
Submission Number: 6
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