Guaranteed Guess: A Language Modeling Approach for CISC-to-RISC Transpilation with Testing Guarantees

ACL ARR 2025 May Submission4260 Authors

Abstract:

The hardware ecosystem is rapidly evolving, with increasing interest in translating low-level programs across different instruction set architectures (ISAs) in a quick, flexible, and correct way to enhance the portability and longevity of existing code. A particularly challenging class of this transpilation problem is translating between complex- (CISC) and reduced- (RISC) hardware architectures, due to fundamental differences in instruction complexity, memory models, and execution paradigms. In this work, we introduce **G**uaranteed **G**uess, an ISA-centric transpilation pipeline that combines the translation power of pre-trained large language models (LLMs) with the rigor of established software testing constructs. Our method generates candidate translations using an LLM from one ISA to another, and embeds such translations within a software-testing framework to build quantifiable confidence in the translation. We evaluate our GG approach over two diverse datasets, enforce high code coverage ($>$98\%) across unit tests, and achieve functional/semantic correctness of 99\% on HumanEval programs and 49\% on BringupBench programs,
respectively. Further, we compare our approach to the state-of-the-art Rosetta 2 framework on Apple Silicon, showcasing 1.73$\times$ faster runtime performance, 1.47$\times$ better energy efficiency, and 2.41$\times$ better memory usage for our transpiled code, demonstrating the effectiveness of GG for real-world CISC-to-RISC translation tasks. We will open-source our codes, data, models, and benchmarks to establish a common foundation for ISA-level code translation research.

Paper Type: Long

Research Area: NLP Applications

Research Area Keywords: code generation, program synthesis, machine programming, software engineering, large language models, system-level NLP, test-based evaluation

Contribution Types: NLP engineering experiment, Approaches low compute settings-efficiency, Publicly available software and/or pre-trained models, Data analysis

Languages Studied: x86 assembly, ARM assembly, RISC-V assembly, C, C++

Submission Number: 4260