TL;DR: We introduce a layout-oriented self-supervised learning approach designed explicitly for circuit layout representation.
Abstract: Recent advancements have integrated various deep-learning methodologies into physical design, aiming for workflows acceleration and surpasses human-devised solutions. However, prior research has primarily concentrated on developing task-specific networks, which necessitate a significant investment of time to construct large, specialized datasets, and the unintended isolation of models across different tasks. In this paper, we introduce DeepLayout, the first general representation learning framework specifically designed for backend circuit design. To address the distinct characteristics of post-placement circuits, including topological connectivity and geometric distribution, we propose a hybrid encoding architecture that integrates GNN with spatial transformers. Additionally, the framework includes a flexible decoder module that accommodates a variety of task types, supporting multiple hierarchical outputs such as nets and layouts. To mitigate the high annotation costs associated with layout data, we introduce a mask-based self-supervised learning approach designed explicitly for layout representation. This strategy involves a carefully devised masking approach tailored to layout features, precise reconstruction guidance, and most critically—two key supervised learning tasks. We conduct extensive experiments on large-scale industrial datasets, demonstrating that DeepLayout surpasses state-of-the-art (SOTA) methods specialized for individual tasks on two crucial layout quality assessment benchmarks. The experiment results underscore the framework’s robust capability to learn the intrinsic properties of circuits.
Lay Summary: Designing computer chips involves complex backend tasks like optimizing circuit layouts for performance and manufacturability. Today, specialized AI models are built for each task—requiring huge, expensive datasets and limiting shared knowledge. We ask: Can one versatile AI framework learn the fundamentals of chip layouts to handle multiple tasks efficiently?
We introduce DeepLayout, the first general AI framework for backend circuit design. It learns a unified understanding of circuits by analyzing both their connectivity (like a wiring) and physical placement using a hybrid neural network. Crucially, it avoids costly manual data labeling with a layout-oriented self-supervised training technique: we mask parts of the layout and train the framework to reconstruct them, helping it learn intrinsic circuit properties. The framework then adapts flexibly to diverse tasks.
Surprisingly, DeepLayout outperformed specialized state-of-the-art tools on critical industrial benchmarks for predicting circuit quality, despite being a generalist. By learning the universal representation of layouts, it effectively predicts chip designs' performance while reducing data costs.
Application-Driven Machine Learning: This submission is on Application-Driven Machine Learning.
Primary Area: Applications->Everything Else
Keywords: Circuirt representation, Pre-training, Self-supervised learning
Submission Number: 2012
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