FGNAS: FPGA-Aware Graph Neural Architecture Search

Qing Lu, Weiwen Jiang, Meng Jiang, Jingtong Hu, Sakyasingha Dasgupta, Yiyu Shi

Keywords: graph neural network, NAS, FPGA

Abstract: The success of gragh neural networks (GNNs) in the past years has aroused grow-ing interest and effort in designing best models to handle graph-structured data. Asthe neural architecture search technique has been witnessed to rival against humanexperts in discovering performant network topologies, recently, it has been appliedto the field of graphic network engineering. However, such works on graphic NASso far are purely software design and not considering hardware constraints at all.To address this problem, we propose the first SW-HW codesign framework forautomating the deployment of GNNs. Using FPGA as the target platform, ourframework is able to performs the FPGA-aware graph neural architecture search(FGNAS). To evaluate our design, we experiment on benckmark datasets, namelyCora, CiteCeer, and PubMed, and the results show FGNAS has better capabil-ity in optimizing the accuracy of GNNs when their hardware implementation isspecifically constrained.

One-sentence Summary: A SW-HW codesign framework for graph neural networks on FPGA.

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