Noise Aware Finetuning for Analog Non-Linear Dot Product Engine

Lei Zhao, Luca Buonanno, Aishwarya Natarajan, Jim Ignowski, Giacomo Pedretti

Keywords: in-memory computing, analog computing, noise

Abstract: As interest in analog acceleration for deep neural networks (DNNs) grows, ReRAM-based Dot-Product Engines (DPEs) offer an energy-efficient solution for performing vector-matrix multiplications (VMMs) in the analog domain. However, DPEs require Analog-to-Digital Converters (ADCs), which contribute significantly to area and power overhead, and rely on digital logic for operations such as non-linear activations. This work presents an ADC-less DNN accelerator that leverages Analog Content Addressable Memory (ACAM) to replace ADCs and digital activation units. By training decision trees to approximate activation functions and programming them to ACAMs, the novel Non-linear DPE (NL-DPE) enables arbitrary activation to be implemented directly in the analog domain, supporting a broader range of future DNN architectures. Additionally, we explore the inherent noise present in real devices of both DPE and ACAM and propose noise-aware finetuning techniques that mitigate accuracy loss, demonstrating notable improvements.

Submission Number: 51