Where Redundancy Lives: Stage-Aware Block Saliency in Skip-Connected Models

ICLR 2026 Conference Submission25281 Authors

20 Sept 2025 (modified: 08 Oct 2025)ICLR 2026 Conference SubmissionEveryoneRevisionsBibTeXCC BY 4.0
Keywords: Residual networks, Post-training pruning, Latency, Model compression
Abstract: Residual (skip-connected) architectures such as ResNets are widely used, yet the extent and structure of their inference-time redundancy remain unclear. We repurpose post-training block ablation as a diagnostic probe: we ablate residual blocks by replacing them with identity mappings, then measure the resulting accuracy drop on a small training ``probe" slice, yielding a block-level saliency map that we evaluate out of sample on ImageNet. Across ResNet-50, our stage-aware analyses show that simple magnitude or energy proxies are weak or inconsistent predictors of, indicating that large activation does not imply importance; redundancy is better explained by low novelty relative to the skip path. We characterize structure using stage-wise distributions, and we assess practical trade-offs by one-shot identity replacement of those blocks with optional short finetuning, reporting realistic latency-accuracy behavior on CPU and GPU while preserving topology. The methodology is architecture-agnostic and readily extends to other modern skip-connected families (for example, ConvNeXt and ViT). These findings provide a simple, evidence-based way to localize redundancy, and to guide architecture-preserving simplifications at inference.
Supplementary Material: pdf
Primary Area: other topics in machine learning (i.e., none of the above)
Submission Number: 25281
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